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Nuvoton Technology announces its collaboration on OpenTitan, the first open source silicon root of trust (RoT) project

Hsinchu, Taiwan, November 5, 2019 – Nuvoton Technology Corporation, today announced it has joined the coalition of partners including lowRISC, Google and others in support of OpenTitan, an open source hardware root of trust (RoT) reference design and integration guidelines that enable chip producers and platform providers to build transparently implemented, high-quality hardware RoT chips tailored for data center servers and other devices.


Security begins with infrastructure. Therefore, starting from the foundation, OpenTitan will help ensure that RoT in hardware is transparently implemented for a multitude of devices such as server motherboards, network cards, routers and IoT. Adopters of this framework can inspect and contribute to OpenTitan’s register-transfer level (RTL) design, firmware, and documentation, helping to build more transparent, trustworthy hardware RoT chips for everyone.


As a major supplier of computing security and management IC products such as TPM (Trusted Platform Module), BMC (Baseboard Management Controller) and secure embedded controllers (EC), Nuvoton has seen a significant increase in demand for RoT solutions from its customers. Combining the OpenTitan framework with Nuvoton’s security IC skills and experience, Nuvoton plans to deliver OpenTitan, market-standard, RoT IC solutions.


Key benefits of OpenTitan for chip manufacturers and platform providers include:

  • Transparent: Adopters can inspect and contribute to OpenTitan’s design, firmware, and documentation, helping to build more transparent, trustworthy hardware RoT chips that benefit everyone.
  • High-quality: OpenTitan’s goal is to build and maintain a high-quality and logically secure RTL design, firmware, and documentation. The project is staffed by expert engineers focused on rigorous design validation and technical documentation, all based on key learnings from designing Google’s Titan chips.
  • Flexible: Adopters can increase their total addressable market and reduce costs by using a single platform-agnostic hardware RoT design that can be integrated in data center servers, peripherals, and any other hardware platforms.


“Nuvoton is striving to provide its customers with best-in-class security IC solutions including RoT ICs for server and client spaces. We believe that an open source hardware approach can bring value to all our customers similarly to what happened in the software space.  A logically open source hardware solution will enable Nuvoton to come-up with a more trusted, transparent and secure solution,” said Erez Naory, Nuvoton’s VP of Marketing Security Products.


“At lowRISC, our mission is to establish a vibrant ecosystem around open silicon designs and to help lower the barrier to producing custom chips,” said Gavin Ferris, lowRISC CIC board member. “Creating an ecosystem of like-minded organizations focused on the goal of improving transparency around chips helps increase trust in the overall security of the infrastructure on which software runs. With OpenTitan, enterprise organizations and consumers alike will benefit from services built on a more secure infrastructure that is anchored in transparently implemented OpenTitan chips.”


“Customers are asked to put faith in proprietary hardware RoT chips for their mission-critical systems without the ability to fully understand, inspect and therefore trust them,” said Dominic Rizzo, OpenTitan Lead, Google Cloud. “By creating OpenTitan with the broader hardware and academic community, we can leverage the experience and security principles used to create Google’s own Titan chips to make hardware RoT designs more transparent, inspectable, and accessible to the rest of the industry. Security should never be built on opacity.”


OpenTitan is managed by an independent organization, lowRISC, which is a not-for-profit engineering company that uses collaborative engineering to develop and maintain open source silicon designs and tools for the long term.

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